Abstract:
Since 1999 specialized hardware architectures for factoring 
numbers of 1024 bit size with the Generalized Number Field 
Sieve (GNFS) have attracted a lot of attention ([Ber], [ST]). 
Concerns about the feasibility of giant monolytic ASIC architectures
such as TWIRL have been raised. Therefore, we propose a parallelized 
lattice sieving device called SHARK, which completes the sieving 
step of the GNFS for a 1024-bit number in one year. Its architecture 
is modular and consists of small ASICs connected by a specialized 
butterfly transport system. We estimate the costs of such a device
to be less than US$ 200 million. Because of the modular architecture 
based on small ASICs, we claim that this device can be built with 
today's technology.

BibTeX:
@InProceedings{I-FKPPPS05,
author = {J. Franke and T. Kleinjung and C. Paar and J. Pelzl and C. Priplata and C. Stahlke},
title = "{SHARK --- A Realizable Special Hardware Sieving Device for Factoring 1024-bit Integers}",
booktitle  = "{Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings}",
pages = {119-130},
year = {2005},
editor = {Josyula R. Rao and Berk Sunar},
volume = {3659},
series = {LNCS},
month = {August},
publisher = {Springer-Verlag}
}