Abstract:
The security of the most popular asymmetric cryptographic scheme RSA depends
on the hardness of factoring large numbers. The best known method for this
integer factorization is the General Number Field Sieve (GNFS). One important
step within the GNFS is the factorization of mid-size numbers without small
prime divisors. \mbox{This can be done efficiently} by the Elliptic Curve 
Method (ECM), e.g. in special hardware.
In this work, we present an efficient hardware implementation of ECM to
factor numbers up to 200 bit, which is also scalable to other bit lengths.
For proof-of-concept purposes, ECM is realized as a software-hardware co-design
on an FPGA and an embedded microcontroller. This appears to be the first 
publication of a realized hardware implementation of ECM. We adapted ECM for 
the requirements of efficient special hardware and provide estimates for a 
state-of-the-art CMOS implementation of the design and for the application of 
massive parallel ECM engines to the GNFS. The factorization of large integers 
such as RSA moduli can be improved considerably by using the ECM hardware 
presented.

BibTeX:
@Article{A-PSKFPSDFP05,
author    = {Jan Pelzl and Martin {\v{S}}imka and Thorsten Kleinjung and 
             Jens Franke and Christine Priplata and Colin Stahlke and 
             Milo{\v{s}} Drutarovsk{\'y} and Viktor Fischer and Christof Paar},
title     = "{Area-Time Efficient Hardware Architecture for Factoring Integers 
             with the Elliptic Curve Method}",
journal   = {IEE Proceedings Information Security},
year      = {2005},
volume = {152},
number = {1},
pages  = {67--78},
month  = {October}
}